Fujitsu F2MC-16LX Hardware Manual page 402

APPENDIX A I/O MAP
Table A-1 I/O Map (3/8)
Address
38 Interrupt/DTP enable register
H
39 Interrupt/DTP source register
H
3A
H
Request level setting register
3B
H
3C
H
Control status register
3D
H
3E
H
Data register
3F
H
40 Reload register L (ch.0)
H
41 Reload register H (ch.0)
H
42 Reload register L (ch.1)
H
43 Reload register H (ch.1)
H
PPG0 operating mode control
44
H
register
PPG1 operating mode control
45
H
register
46 PPG0, PPG1 output control register
H
47
H
48 Reload register L (ch.2)
H
49 Reload register H (ch.2)
H
4A Reload register L (ch.3)
H
4B Reload register H (ch.3)
H
PPG2 operating mode control
4C
H
register
PPG3 operating mode control
4D
H
register
4E PPG2, PPG3 output control register
H
4F
H
386
Register Abbreviation Access
ENIR R/W
EIRR R/W
ELVR R/W
ADCS0 R/W
ADCS1 R/W!
ADCR0 R/W!
ADCR1 R/W!
PRLL0 R/W
PRLH0 R/W
PRLL1 R/W
PRLH1 R/W
PPGC0 R/W
PPGC1 R/W
PPGE1 R/W
Not available
PRLL2 R/W
PRLH2 R/W
PRLL3 R/W
PRLH3 R/W
PPGC2 R/W
PPGC3 R/W
PPGE2 R/W
Not available
Peripheral Initial value
00000000
DTP/
XXXXXXXX
external
interrupt
00000000
circuit
00000000
00000000
00000000
A/D
converter
XXXXXXXX
00001-XX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
8/16 bit
PPG0/1
0-000--1
0-000001
00000000
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
8/16 bit
PPG2/3
0-000--1
0-000001
00000000
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B