Machine Clock - Fujitsu F2MC-16LX Hardware Manual

Mb90550a/b series, 16-bit
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CHAPTER 5 LOW-POWER CONSUMPTION CONTROL CIRCUIT
5.7

Machine Clock

Switch the machine clock by setting the MCS bit in the clock selection register
(CKSCR).
■ Machine Clock Initialization
The MCS bit is not initialized by a reset caused by the RST pin or RST bit. The bit is initialized
to "1" by a power-on, hardware standby, or watchdog reset.
Note:
When the operating voltage is 5 V, the OSC oscillation frequency range is from 3 to 16 MHz, but the
maximum operating frequency of the CPU and peripheral circuits is 16 MHz.
generated by the specified multiplication factor exceeds the maximum operating frequency, the CPU
and peripheral circuits do not operate normally. For example, if the OSC oscillation frequency is
16 MHz, only "1" can be specified as the multiplication factor. The minimum operating frequency of
VCO oscillation is 8 MHz, which is the minimum frequency that can be specified.
■ Switching the Machine Clock
Writing to the MCS bit in the CKSCR register switches between the main and PLL clocks.
Setting the MCS bit from "1" to "0" switches from the main clock to the PLL clock after the
oscillation stabilization time for the PLL clock (2
Setting the MCS bit from "0" to "1" switches from the PLL clock to the main clock. This switch
occurs when a PLL clock edge coincides with a main clock edge (after one to eight PLL clock
cycles).
When the MCS bit is rewritten, the machine clock is not immediately switched. Operate each
peripheral depending on the machine clock after referencing the MCM bit to check that the
machine clock has been switched.
Note:
During switching of the clock mode, do not attempt to switch to another clock mode or the low power
consumption mode until switching is completed. To verify that switching has completed, check the
MCM bit of the clock selection register (CKSCR).
110
13
machine clock cycles) has elapsed.
If the frequency

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