Writing Data In The Flash Memory - Fujitsu F2MC-16LX Hardware Manual

23.7.2 Writing Data in the Flash Memory

This section describes the procedure for writing data in the flash memory issuing the
write command.
■ Writing Data in the Flash Memory
The data writing automatic algorithm of the flash memory can be activated by continuously
sending the write command, listed in the command sequence table (see Table 23.5-1 in Section
"23.5 Activating the Automatic Algorithm of the Flash Memory"), to the target sector in the flash
memory. When the data writing to the target address ends in the fourth cycle, the automatic
algorithm is activated and the automatic writing starts.
❍ Addressing
Only an even address is possible as the write address to be specified in the write data cycle. If
an odd address is specified, data cannot be written correctly. In other words, writing to the
even address in word data units is required.
Writing is possible in any address order and outside the sector boundary. However, only one-
word data can be written by one execution of the write command.
❍ Notes on writing data
Data "0" cannot be returned to data "1" by writing. If data "1" is written in data "0", the data
polling algorithm (DQ7) or toggle operation (DQ6) does not end and the flash memory element
is determined to be faulty. The timing limit excess flag (DQ6) assumes an error because the
specified writing time is exceeded, or it seems as if data 1 is written. However, if data is read in
the read or reset status, data remains "0". Only a deletion operation can set data "0" to "1".
During automatic writing, all commands are ignored. Note that if the hardware reset is activated
during writing, the data written in the address is not guaranteed.
■ Procedure for Writing Data in the Flash Memory
Figure 23.7-1 shows an example of the flash memory writing. The status of the automatic
algorithm in the flash memory can be determined using the hardware sequence flag (see
Section "23.6 Confirming the Automatic Algorithm Execution Status"). The data polling flag
(DQ7) is used to confirm the end of writing.
The data to be read for flag checking is read from the address in which the last writing was
made.
The data polling flag (DQ7) changes when the timing limit excess flag (DQ5) changes.
Therefore, even if the timing limit excess flag (DQ5) is "1", the data polling bit flag bit (DQ7)
must be rechecked.
Similarly, the toggle bit flag (DQ6) stops the toggle operation when the timing limit excess flag
bit (DQ5) changes to "1". Therefore, the toggle bit flag (DQ6) must be rechecked.
23.7 Detailed Explanations of Flash Memory Writing and Deletion
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