Table Of Contents - Fujitsu F2MC-16LX Hardware Manual

CONTENTS
CHAPTER 1 OVERVIEW ................................................................................................... 1
1.1 Features .............................................................................................................................................. 2
1.2 Available Models ................................................................................................................................. 5
1.3 Block Diagram .................................................................................................................................... 6
1.4 External Dimensions of the Package .................................................................................................. 7
1.5 Pin Assignment ................................................................................................................................... 9
1.6 Description of the Pin Functions ....................................................................................................... 11
1.7 I/O Circuit Types ............................................................................................................................... 17
1.8 Cautions on Handling Devices .......................................................................................................... 21
CHAPTER 2 CPU ............................................................................................................ 25
2.1 Memory Space .................................................................................................................................. 26
2.2 Addressing ........................................................................................................................................ 27
2.3 Allocating Multiple-byte Data in a Memory Space ............................................................................ 30
2.4 Dedicated Registers ......................................................................................................................... 31
2.4.1 Accumulator (A) ........................................................................................................................... 33
2.4.2 User Stack Pointer (USP) and System Stack Pointer (SSP) ....................................................... 35
2.4.3 Processor Status (PS) ................................................................................................................. 36
2.4.4 Program Counter (PC) ................................................................................................................. 39
2.4.5 Direct Page Register (DPR) ........................................................................................................ 40
2.4.6 Bank registers (PCB, DTB, USB, SSB, ADB) .............................................................................. 41
2.5 General-purpose Registers ............................................................................................................... 42
2.6 Prefix Codes ..................................................................................................................................... 44
2.7 Interrupt Suppression Instructions and Prefix Codes ....................................................................... 46
2.8 Notes on Using the "DIV A, Ri" and "DIVW A, RWi" Instructions ..................................................... 47
CHAPTER 3 INTERRUPTS ............................................................................................. 51
3.1 Overview of Interrupts ....................................................................................................................... 52
3.2 Interrupt Causes ............................................................................................................................... 53
3.3 Interrupt Vectors ............................................................................................................................... 56
3.4 Hardware Interrupts .......................................................................................................................... 58
3.4.1 Operation of Hardware Interrupts ................................................................................................ 61
3.4.2 Operating Flow for Hardware Interrupts ...................................................................................... 64
3.4.3 Example of Procedure for Using Hardware Interrupts ................................................................. 65
3.5 Software Interrupts ........................................................................................................................... 66
3.6 Expanded Intelligent I/O Service (EI
3.6.1 Interrupt Control Register (ICR) ................................................................................................... 70
3.6.2 Expanded Intelligent I/O Service Descriptor (ISD) ...................................................................... 73
3.6.3 Operation of the Expanded Intelligent I/O Service (EI
3.6.4 Execution Time of the Expanded Intelligent I/O Service (EI
3.7 Exceptions because of Executing Undefined Instructions ................................................................ 80
2
OS) ......................................................................................... 68
2
OS) ......................................................... 77
v
2
OS) ................................................ 79