Fujitsu F2MC-16LX Hardware Manual page 360

Mb90550a/b series, 16-bit
Hide thumbs Also See for F2MC-16LX:
Table of Contents

Advertisement

CHAPTER 23 1M-BIT FLASH MEMORY
■ Sector Configuration of the 1M-bit Flash Memory
Figure 23.2-2 shows the sector configuration of the 1M-bit flash memory and the high-order and
low-order address of each sector.
For access from the CPU, SA0 is stored in the FE bank register and SA1 to SA6 are stored in
the FF bank register.
Figure 23.2-2 Sector Configuration of the 1M-bit Flash Memory
*: A writer address is associated with a CPU address when data is written in the flash memory by the parallel writer.
This address is used to perform writing or deletion using the general-purpose writer.
344
Flash memory
CPU address
FFFFFF
SA6 (16K bytes)
FFC000
FFBFFF
SA5 (512 bytes)
FFBE00
FFBDFF
SA4 (512 bytes)
FFBC00
FFBBFF
SA3 (7K bytes)
FFA000
FF9FFF
SA2 (8K bytes)
FF8000
FF7FFF
SA1 (32K bytes)
FF0000
FEFFFF
SA0 (64K bytes)
FE0000
Writer address *
7FFFF
H
H
7C000
H
H
7BFFF
H
H
7BE00
H
H
7BDFF
H
H
7BC00
H
H
7BBFF
H
H
7A000
H
H
79FFF
H
H
78000
H
H
77FFF
H
H
70000
H
H
6FFFF
H
H
60000
H
H

Advertisement

Table of Contents
loading

Table of Contents