Write Timing For The Reload Registers - Fujitsu F2MC-16LX Hardware Manual

12.4.5 Write Timing for the Reload Registers

In all modes except the 16-bit PPG 1-ch mode, it is recommended that a word transfer
instruction be used to write to the reload registers PRLL and PRLH. If a byte transfer
instruction is used twice to write data in these registers, an output with an
unpredictable pulse width may result, depending on the write timing.
■ Write Timing for the Reload Registers
PPG0
In the above timing chart, suppose that the PRLL content is rewritten from A to C before (1), and
that after (1), the PRLH content is rewritten from B to D. In such a case, a low for count C and a
high for count B are output only once because at point (1), the PRL values include C in PRLL
and B in PRLH.
Similarly, in the 16-bit PPG mode, perform long-word transfer to write data in PRL for ch.0 and
ch.1, or perform word transfer to write data in PRL in order from ch.0 to ch.1. In this mode, a
write to PRLL for ch.0 is performed temporarily.
performed, a write to PRL for ch.0 is performed.
In modes other than the 16-bit PPG mode, a write to PRL for ch.0 and ch.1 can be performed
separately.
Data to be written to PRL for ch.0
Write for ch.0 in other
than 16-bit PPG 1-ch mode
Figure 12.4-3 Write Timing Chart
B
A A
Figure 12.4-4 Block Diagram for the PRL Write Portion
Temporary latch
PRL for ch.0
B C B C
D
(1)
After a write to PRL for ch.1 has been
Data to be written to PRL for ch.1
In 16-bit PPG 1-ch mode,
data is transferred in
synchronism with
write for ch.1.
12.4 8/16-Bit PPG Operation
C
D
Write for ch.1
PRL for ch.1
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