Fujitsu F2MC-16LX Hardware Manual page 419

Figure B.4-2 Example of Register Indirect Addressing with Post Increment (@RWj+ j = 0 to 3)
MOVW A, @RW1+ (This instruction reads data by register indirect addressing with post
Before execution
After execution
● Register indirect addressing with offset (@RWi + disp8 i = 0 to 7, @RWj + disp16 j = 0 to 3)
Memory is accessed using the address obtained by adding an offset to the contents of general-purpose
register RWj. Two types of offset, byte and word offsets, are used. They are added as signed numeric
values. Address bits 16 to 23 are indicated by the data bank register (DTB) when RW0, RW1, RW4, or
RW5 is used, system stack bank register (SSB) or user stack bank register (USB) when RW3 or RW7 is
used, or additional data bank register (ADB) when RW2 or RW6 is used.
Figure B.4-3 Example of Register Indirect Addressing with Offset
(@RWi + disp8 i = 0 to 7, @RWj + disp16 j = 0 to 3)
MOVW A, @RW1+10H (This instruction reads data by register indirect addressing with
Before execution
After execution
increment and stores it in A.)
A 0 7 1 6 2 5 3 4
RW1 D 3 0 F DTB 7 8
A 2 5 3 4 F F E E
RW1 D 3 1 1 DTB 7 8
an offset and stores it in A.)
A 0 7 1 6 2 5 3 4
RW1 D 3 0 F DTB 7 8
A 2 5 3 4 F F E E
RW1 D 3 0 F DTB 7 8
APPENDIX B Instructions
Memory space
78D30F
H
78D310
H
(+10 ) Memory space
H
78D31F E E
H
78D320 F F
H
E E
F F
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