Overview Of The 1M-Bit Flash Memory - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 23 1M-BIT FLASH MEMORY

23.1 Overview of the 1M-Bit Flash Memory

The 1M-bit flash memory is allocated in banks FE to FF on the CPU memory map. As
in mask ROM, it can be subjected to a read access and program access from the CPU
using the flash memory interface circuit function. Because data can be written or
deleted for the flash memory by instructions from the CPU through the flash memory
interface circuit, data can be rewritten in the installation status by control of the
internal CPU. This enables programs and data to be improved.
Sector operations such as enable and sector protect cannot be used.
■ Features of the 1M-bit Flash Memory
• Configuration of the 128K words × 8K or 64K words × 16 bits (16K + 512 × 2 + 7K + 8K +
32K + 64K) sector
• Automatic program algorithm (Embedded Algorithm: Same as for MBM29F400TA)
• Function for temporarily stopping deletion and function for restarting it
• Detecting the completion of writing and deletion using the data polling and toggle bits
• Deleting the completion of writing and deletion using CPU interrupts
• Compatibility with the JEDEC standard commands
• Enabling data to be deleted for each sector (combining sectors freely)
• Number of times of writing or number of times of deletions (minimum): 10,000
Embedded Algorithm
■ Writing and Deleting Data for the Flash Memory
Writing or deletion and reading for the flash memory cannot occur at the same time. In other
words, when data is written or deleted for the flash memory, writing only is possible by the
following operation without a program access from the flash memory: the program on the flash
memory is copied onto the RAM and the RAM is executed.
■ Flash Memory Register
❍ Flash memory control status register (FMCS)
bit
Address: 0000AE
H
Read/write
Initial value
342
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is a trademark of Advanced Micro Devices, Inc.
7 6 5
INTE RDYINT WE
(R/W) (R/W) (R/W)
(0) (0) (0)
4 2
3
RDY Reserved
(R) (W) (W)
(1) (0) (-)
1 0
LPM
(W) (R/W)
(-) (0)