I/O Port Registers - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 7 I/O PORTS
7.3

I/O Port Registers

The five I/O port registers are as follows:
• Port data registers (PDRx)
• Port data direction registers (DDRx)
• Output pin register (ODR4)
• Input resistor registers (RDR0 and RDR1)
• Analog input enable register (ADER)
■ I/O Port Registers
Port data register
Address:PDR1 000001
H
PDR3 000003
H
PDR7 000007
H
PDR9 000009
H
Read/write
Initial value
Address:PDR5 000005
H
Read/write
Initial value
Address:PDR0 000000
H
PDR2 000002
H
PDR4 000004
H
PDR6 000006
H
PDR8 000008
H
PDRA 00000A
H
Read/write
Initial value
Address:PDRA 00000A
H
Read/write
Initial value
Port data direction register
Address:DDR1 000011
H
DDR3 000013
H
DDR7 000017
H
DDR9 000019
H
Read/write
Initial value
Address:DDR0 000010
H
DDR2 000012
H
DDR4 000014
H
DDR6 000016
H
DDR8 000018
H
Read/write
Initial value
Note: Port 5 has no port data direction register.
138
Figure 7.3-1 I/O Port Registers
7 6 5
bit
Px7 Px6 Px5
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(X) (X) (X) (X)
7 6 5
bit
P55
(-) (-) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(-) (-) (1) (1)
7 6 5
bit
Px7 Px6 Px5
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(X) (X) (X)
7 6 5
bit
(-) (-) (-)
(-) (-) (-)
7 6 5
bit
Dx7 Dx6 Dx5
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(0) (0) (0) (0)
7 6 5
bit
Dx7 Dx6 Dx5
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(0) (0) (0)
4 2
3
Px4 Px3 Px2 Px1
(X) (X) (X)
4 2 1
3
P54 P53 P52 P51
(1) (1) (1)
4 2
3
Px4 Px3 Px2 Px1
(X) (X) (X) (X)
4 2
3
PA4 PA3 PA2 PA1
(R/W) (R/W) (R/W) (R/W) (R/W)
(X) (X) (X) (X)
4 2
3
Dx4 Dx3 Dx2 Dx1
(0) (0) (0)
4 2
3
Dx4 Dx3 Dx2 Dx1
(0) (0) (0) (0)
1 0
Px0 PDRx
x=1,3,7,9
(X)
0
P50 PDR5
(1)
1 0
Px0 PDRx
x=0,2,4,6,8
(X)
1 0
PA0 PDRA
(X)
1 0
Dx0 DDRx
x=1,3,7,9
(0)
1 0
Dx0 DDRx
x=0,2,4,6,8
(0)
(Continued)