Fujitsu F2MC-16LX Hardware Manual page 54

Mb90550a/b series, 16-bit
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CHAPTER 2 CPU
Table 2.4-1 Level Hierarchy of the Levels Indicated by the Interrupt Level Mask Register
ILM2
0
0
0
0
1
1
1
1
38
(ILM)
ILM1
ILM0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
Level of interrupts to be allowed
Level value
0
Interrupt prohibited
1
0 only
2
Level value of less than 1
3
Level value of less than 2
4
Level value of less than 3
5
Level value of less than 4
6
Level value of less than 5
7
Level value of less than 6

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