Fujitsu F2MC-16LX Hardware Manual page 351

Figure 21.5-2 Flow of the Program Patch Processing
Reset
Reads 00 of E
H
YES
2
0000 (E PROM)=0
H
Reads the address.
0001 0003 (E
H H
MOV
PADR0(MCU)
Reads the patch program.
0010 0090 (E
H H
MOV
000400 000480
H
Enables the patch processing.
MOV PACSR,#02H
Executes the normal program
PC=PADR0
YES
INT9
2
E PROM
FFFF
H
0090
H
Patch program
0010
H
Program address
low-order: 00
0003
H
Program address
middle-order: 00
0002
H
Program address
high-order: 00
0001
H
Number of bytes of
the patch program: 80
0000
H
21.5 Program Example of the Address Match Detection Function
2
PROM
NO
2
PROM)
2
PROM)
(MCU)
H
NO
ROM
RAM
INT9
To the patch program
JMP 000400H
Executes the patch program.
000400 000480
H
Terminates the patch program.
JMP FF0050H
MB90553A
FFFFFF
H
FF0050
H
Abnormal program
FF0000
H
FE0000
H
001100
H
Stack area
RAM area
000480
H
Patch program
000400
H
RAM and register area
000100
H
I/O area
000000
H
H
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