Operation Of A/D Converter - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 15 A/D CONVERTER

15.3 Operation of A/D Converter

The A/D converter is operated using a successive approximation method and has 8- or
10-bits resolution. Because the A/D converter has only one register to store
conversion results (8- or 10-bit), the conversion data registers (ADCR1 and ADCR0) are
updated upon completing conversion. For this reason, the A/D converter alone is not
suitable for successive conversion. Therefore, conversion by transferring conversion
data to memory using the EI
■ Single Mode
In single mode, the A/D converter sequentially converts analog outputs set by ANS and ANE
bits and terminates operation when the conversion of the end channel set by the ANE bit is
completed.
If the start channel and end channel are the same (ANS = ANE), only the channel specified by
ANS is converted.
[Example]
ANS = 000, ANE = 011
Start --> AN0 --> AN1 --> AN2 --> AN3 --> End
ANS = 010, ANE = 010
Start --> AN2 --> End
■ Successive Mode
In successive mode, the A/D converter sequentially converts analog outputs set by ANS and
ANE bits, returns to analog outputs by ANS, and continues operation when the conversion of
the end channel set by the ANE bit is completed.
If the start channel and end channel are the same (ANS = ANE), only the channel specified by
ANS continues to be converted.
[Example]
ANS = 000, ANE = 011
Start --> AN0 --> AN1 --> AN2 --> AN3 --> AN0 --> Repeat
ANS = 010, ANE = 010
Start --> AN2 --> AN2
Conversion in successive mode is continued until 0 is written to the BUSY bit. (Writing "0" to
the BUSY bit, forced stop of operation)
Note that the conversion of data is not completed if the operation is stopped forcibly (In this
case, the previous data whose conversion is completed is stored in the conversion register).
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2
OS function is recommended.
--> AN2 --> Repeat