Reload Registers (Prll/Prlh) - Fujitsu F2MC-16LX Hardware Manual

12.3.4 Reload Registers (PRLL/PRLH)

The reload registers (PRLL/PRLH), each consisting of 8 bits, hold a value to be
reloaded to the down counter PCNT.
■ Reload Registers (PRLL/PRLH)
Reload register H
:ch.0 0041
Address
H
ch.1 0043
H
ch.2 0049
H
ch.3 004B
H
ch.4 0051
H
ch.5 0053
H
Read/write
Initial value
Reload register L
Address
:ch.0 0040
H
ch.1 0042
H
ch.2 0048
H
ch.3 004A
H
ch.4 0050
H
ch.5 0052
H
Read/write
Initial value
The reload registers (PRLL/PRLH) have the function shown in Table 12.3-12. Each register can
be read from and written to.
Table 12.3-12 Reload Registers (PRLL/PRLH)
Register name
Note:
In the 8-bit prescaler + 8-bit PPG mode, setting different values in PRLL and PRLH for ch.0 may vary
the PPG waveform on ch.1 from cycle to cycle. Therefore, it is recommended that the same value be
set in PRLL and PRLH for ch.0.
Figure 12.3-5 Reload Registers (PRLL/PRLH)
bit
15 14
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(X) (X) (X)
bit 7 6
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(X) (X) (X)
0 Holds the reload value for lower data.
1 Holds the reload value for higher data.
12.3 Registers in the 8/16-Bit PPG
13 12 11 10
(X) (X) (X) (X)
5 4 3
(X) (X) (X)
Function
9 8
PRLH
(X)
2 1 0
PRLL
(X) (X)
205