Overview Of The Time-Based Timer - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 8 TIME-BASED TIMER
8.1

Overview of the Time-Based Timer

The time-based timer consists of an 18-bit timer and a circuit for controlling interval
interrupts and uses oscillation clocks regardless of the MCS bit in CKSCR.
■ Time-based Timer Register
Time-based timer control register
Address:0000A9
Read/write
Initial value
■ Time-based Timer Block Diagram
TBTC
TBC1
TBC0
TBR
TBIE
TBOF
Time-base
interrupt
WDTC
WT1
WT0
WTE
PONR
STBR
WRST
ERST
SRST
148
Figure 8.1-1 Time-based Timer Register
15 14
bit
H
Reserved
(-) (-)
(1) (-)
Figure 8.1-2 Time-based Timer Block Diagram
Selector
AND
Selector
13 12 11 10
TBIE TBOF TBR TBC1 TBC0
(-) (R/W) (R/W) (W)
(-) (0) (0) (1)
Clock input
2
12
14
2
Time-based timer
2 16
2
19
TBTRES
2 2 14
12
Watchdog reset
2-bit counter
generation circuit
OF
CLR CLR
9
8
TBTC
(R/W) (R/W)
(0) (0)
Oscillation clock
2 16 2
19
To the WDGRST internal
reset generation circuit
From power-on generation
From the hardware
standby control circuit
RST pin
From the RST bit of
the LPMCR register