Addressing - Fujitsu F2MC-16LX Hardware Manual

Mb90550a/b series, 16-bit
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2.2

Addressing

The following two methods can be used to specify addresses of the F
• Linear method: All 24 bits of the address are specified in the instructions.
• Bank method:
■ Linear Addressing Methods
The linear addressing methods can be classified into the following two types:
24-bit operand specification:
32-bit register indirect specification: The lower 24 bits of the 32-bit general-purpose register
Figure 2.2-1 Example of the 24-bit Operand Specification in the Linear Addressing Method
JMPP 123456H
Old program counter
+ program bank
New program counter
+ program bank
Figure 2.2-2 Example of the 32-bit Register-Indirect Specification in the Linear Addressing Method
MOV A,@RL1+7
■ Addressing by the Bank Method
The bank method divides the 16 MB memory space into 256 banks of each 64KB and specifies
the bank associated with each space using the following five bank registers:
The higher 8 bits of an address are specified by the bank register
associated with an application, while only the lower 16 bits of the
address are specified by the instruction.
17
452D
12
3456
Old AL
XXXX
New AL
003A
A 24-bit address is directly specified by an operand.
are used as an address.
17452D
H
123456
H
090700
H
+7
RL1
(Higher 8 bits are ignored.)
2.2 Addressing
2
MC-16LX
JMPP 123456H
Next instruction
3A
240906F9
27

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