Baud Rate Control Function - NEC UPD703116 User Manual

32-bit single-chip microcontrollers
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11.8.7 Baud rate control function

(1) Prescaler
The FCAN controller of the V850E/IA1 includes a prescaler for dividing the clock supplied to the CAN (f
This prescaler generates a clock (f
CAN base clock (f
MEM
256 applied to the CAN base clock (f
register (C1BRP)).
(2) Nominal bit time (8 to 25 time quantum)
A definition of 1 data bit time is shown below.
Remark
1 time quantum = 1/f
Sync segment
Segment name
Sync segment
(Synchronization Segment)
Prop segment
(Propagation Segment)
Phase segment 1
(Phase Buffer Segment 1)
Phase segment 2
(Phase Buffer Segment 2)
SJW
(reSynchronization Jump Width)
Note IPT: Information Processing Time
IPT is a period in which the current bit level is referenced and judgment for the next processing is
performed. IPT is indicated by the expression below using the clock supplied to CAN (f
IPT = 1/f
MEM1
CHAPTER 11 FCAN CONTROLLER
) that is based on a division ratio ranging from 2 to 128 applied to the
BTL
) when the C1BRP register's TLM bit = 0 and based on a division ratio ranging from 2 to
) when the TLM bit = 1 (refer to 11.10 (26) CAN1 bit rate prescaler
MEM
BTL
Figure 11-21. Nominal Bit Time
Nominal bit time
Prop segment
SJW
Segment length
1
1 to 8 (programmable)
1 to 8 (programmable)
Maximum value from
phase segment 1 or
Note
IPT
(IPT = 0 to 2)
1 to 4 (programmable)
× 3
User's Manual U14492EJ5V0UD
Phase segment 1
Phase segment 2
Sample point
Description
This segment begins when resynchronization occurs.
This segment is used to absorb the delays caused by
the output buffer, CAN bus, and input buffer.
It is set to return an ACK signal until phase segment 1
begins.
Prop segment time ≥ (output buffer delay) + (CAN bus
delay) + (input buffer delay)
This segment is used to compensate for errors in the
data bit time. It accommodates a wide margin or error
but slows down communication speed.
This sets the range for bit synchronization.
MEM1
SJW
).
MEM1
539
).

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