Nbd Function Register Map - NEC UPD703116 User Manual

V850E/IA1
Caution The debug function does not operate under the following conditions.
• During reset period
• Until DMA initialization termination after reset
• Software STOP mode/IDLE mode
• Oscillation stabilization time (during TBC count)

12.2 NBD Function Register Map

Table 12-2 shows a map of the control registers of the NBD function. The NBD space does not exist in the internal
space of the CPU but exists independently as NBD space. Because of this, the NBD space is space that cannot be
read or written from the CPU but can only be read or written via the NBD dedicated interface (refer to Figure 12-1).
Address
000H Chip ID register 0
001H Chip ID register 1
002H Chip ID register 2
800H User event address setting register
801H
802H
803H
820H User event condition setting register
Caution Since the V850E/IA1 NBD uses the DMA controller that is incorporated in the V850E1 CPU core,
settings for the DMA controller are initialized after reset.
626
CHAPTER 12 NBD FUNCTION (
Figure 12-1. Image of NBD Space
CPU
Not
possible
NBD
unit
NBD : Non Break Debug
Table 12-2. NBD Space Map
Register Name
User's Manual U14492EJ5V0UD
µ
PD70F3116)
NBD dedicated
interface (7 ways)
Symbol
TID0
TID1
TID2
EVTU_A0 to EVTU_A7
EVTU_A8 to EVTU_A15
EVTU_A16 to EVTU_A23
EVTU_A24 to EVTU_A27
EVTU_C0
NBD
tool
R/W After Reset
R 4EH
01H
01H
R/W Undefined
Undefined
Undefined
Undefined
Undefined