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Edition
2nd
Addition of Caution and deletion of part of bit description in 11.10 (19) CAN1 address
edition
mask a registers L and H (C1MASKLa and C1MASKHa)
Addition of Caution and addition of bit description in 11.10 (20) CAN1 control register
(C1CTRL)
Modification of description on bits that can be manipulated, addition and deletion of bit
description, and deletion of Caution and modification of bit description in 11.10 (21) CAN1
definition register (C1DEF)
Modification of description on bits that can be manipulated in 11.10 (24) CAN1 interrupt
enable register (C1IE)
Modification of bit settings in 11.10 (25) CAN1 bus active register (C1BA)
Modification of Caution and bit settings in 11.10 (28) CAN1 synchronization control
register (C1SYNC)
Modification of Figure 11-28 CAN Global Interrupt Enable Register (CGIE) Settings
Modification of Figure 11-35 CAN1 Address Mask a Registers L and H (C1MASKLa
and C1MASKHa) (a = 0 to 3) Settings
Modification of 11.11.3 Receive setting
Modification of Figure 11-44 CAN Stop Mode Settings
Modification of Figure 11-45 Clearing of CAN Stop Mode
Modification of description in 11.12 Rules for Correct Setting of Baud Rate
Modification of description in 11.14.2 Burst read mode
Addition of description in 11.15.1 Interrupts that are generated for FCAN controller
Modification of description in 11.15.2 Interrupts that are generated for global CAN
interface
Addition of <2> and <3> in 11.17 Cautions on Use
Addition of description in 12.1 (2) Event detection function
Modification of Figure 12-1 Image of NBD Space
Addition of description in 12.4.1 (1) (b) Read command
Addition of Caution in 12.4.2 (2) (b) NBD event address register (EVTU_A)
Addition of description for NBDLL, modification of description on bits that can be
manipulated, and deletion of part of Remark in 12.5 (1) RAM access data buffer register
L (NBDL)
Addition of description for NBDHL, modification of description on bits that can be
manipulated, and deletion of part of Remark in 12.5 (2) RAM access data buffer register
H (NBDH)
Addition of description to (1) in 12.6.1 General restrictions
Addition of description and Caution to (4) in 12.6.3 Restrictions related to NBD event
trigger function
Modification of description on bits that can be manipulated, modification of bit names, and
addition of bit descriptions in 13.3 (1) A/D scan mode registers 00 and 10 (ADSCM00,
ADSCM10)
Modification of description on bits that can be manipulated and modification of bit
description in 13.3 (2) A/D scan mode registers 01 and 11 (ADSCM01, ADSCM11)
820
APPENDIX D REVISION HISTORY
Major Revision from Previous Edition
User's Manual U14492EJ5V0UD
(7/13)
Applied to:
CHAPTER 11
FCAN
CONTROLLER
CHAPTER 12
NBD FUNCTION
µ
(
PD70F3116)
CHAPTER 13 A/D
CONVERTER
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