NEC UPD703116 User Manual page 383

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TMC31 OST ENT1
Bit position Bit name
7 OST
6 ENT1
5 ALV
4 ETI
3 CCLR
2 ECLR
1 CMS1
0 CMS0
CHAPTER 9 TIMER/COUNTER FUNCTION
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ALV ETI CCLR
Sets the operation when TM3 overflows.
0: Continue count operation after overflow (free-running mode)
1: After overflow, timer holds 0000H and stops count operation (overflow stop
mode). At this time, the TM3CE bit of TMC30 remains "1". The count operation
is resumed by again writing "1" to the TM3CE bit.
Enables/disables output of external pulse output (TO3).
0: Disable external pulse output. Output of inactive level of ALV bit to TO3 pin is
fixed. TO3 pin level remains unchanged even if match signal from
corresponding compare register is generated.
1: Enable external pulse output. Compare register match causes TO3 output to
change. However, in capture mode, TO3 output does not change. An ALV bit
inactive level is output from the time when timer output is enabled until a match
signal is generated.
Caution If either CC30 or CC31 is specified as a capture register, the ENT1
bit must be set to "0".
Specifies active level of external pulse output (TO3).
0: Active level is low level.
1: Active level is high level.
Caution The initial value of the ALV bit is "1".
Switches count clock between external clock and internal clock.
0: Specifies input clock (internal). The count clock can be selected with bits CS2
to CS0 of TMC30.
1: Specifies external clock (TI3). Valid edge can be selected with bits TES31,
TES30 of SESC.
Enables/disables TM3 clearing during compare operation.
0: Disable clearing.
1: Enable clearing (TM3 is cleared when CC30 and TM3 match during compare
operation).
Enables TM3 clearing by external clear input (TCLR3).
0: Disable clearing by TCLR3.
1: Enable clearing by TCLR3 (counting resumes after clearing).
Selects operation mode of capture/compare register (CC31).
0: Register operates as capture register.
1: Register operates as compare register.
Selects operation mode of capture/compare register (CC30).
0: Register operates as capture register.
1: Register operates as compare register.
User's Manual U14492EJ5V0UD
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ECLR CMS1 CMS0
Function
Address Initial value
FFFFF688H 20H
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