NEC UPD703116 User Manual page 205

Table 8-1 shows the operation of the clock generator in normal operation mode, HALT mode, IDLE mode, and
software STOP mode.
An effective low power consumption system can be realized by combining these modes and switching modes
according to the required use.
Release according to RESET,
NMI, or maskable interrupt
Set STOP mode
Software STOP mode
Note INTPn (n = 0 to 6, 20 to 25)
However, when a digital filter using clock sampling is selected as the noise eliminator for INTP20 to
INTP25, the software STOP or IDLE mode cannot be released.
CHAPTER 8 CLOCK GENERATION FUNCTION
Figure 8-1. Power Save Mode State Transition Diagram
Normal operation mode
Note
Set IDLE mode
User's Manual U14492EJ5V0UD
Release according to RESET,
NMI, or maskable interrupt
Set HALT mode
Release according to RESET,
Note
NMI, or maskable interrupt
IDLE mode
HALT mode
205