NEC UPD703116 User Manual page 298

(b) Up/down counter mode (UDC mode)
In the UDC mode, TM1n functions as a 16-bit up/down counter, counting based on the TCUD1n and
TIUD1n input signals.
This mode is divided into the UDC mode A and UDC mode B, depending on the condition of clearing
TM1n.
The conditions for clearing the TM1n are classified as follows depending on the operation mode.
Operation Mode TUMn Register
CMD
Bit
General-purpose 0
timer mode
UDC mode A 1
UDC mode B 1
Settings other than the above
Remarks 1. n = 0, 1
2. ×: Indicates that the set value of that bit is ignored.
298
CHAPTER 9 TIMER/COUNTER FUNCTION
Table 9-5. Timer 1 (TM1n) Clear Conditions
TMC1n Register
MSEL ENMD CLR1
Bit Bit Bit
×
0 0
×
1
×
0 0
×
0
×
1
×
1
× ×
1
User's Manual U14492EJ5V0UD
CLR0
Bit
×
Clearing not performed (free-running timer)
×
Cleared upon match with CM1n0 set value
0 Cleared only by TCLR1n input
1 Cleared upon match with CM1n0 set value during up-
count operation
0 Cleared by TCLR1n input or upon match with CM1n0 set
value during up-count operation
1 Clearing not performed
×
Cleared upon match with CM1n0 set value during up-
count operation or upon match with CM1n1 set value
during down-count operation
Setting prohibited
TM1n Clear