NEC UPD703116 User Manual page 587

(a) Read (2/2)
Bit position Bit name
1 E_INT1
0 E_INT0
(b) Write (1/2)
Bit position Bit name
14, 6 set
E_INT6,
clear
E_INT6
13, 5 set
E_INT5,
clear
E_INT5
12, 4 set
E_INT4,
clear
E_INT4
11, 3 set
E_INT3,
clear
E_INT3
CHAPTER 11 FCAN CONTROLLER
This is the receive completion interrupt enable flag.
0: Interrupt disabled
1: Interrupt enabled
• When IE bit of the M_CTRLn register is 1, a reception completion interrupt occurs
regardless of the setting of the E_INT1 bit if the transmit message buffer receives a
remote frame while the auto response function is not set (RMDE0 bit of the M_CTRLn
register = 0) (n = 00 to 31).
This is the transmit completion interrupt enable flag.
0: Interrupt disabled
1: Interrupt enabled
Sets/clears the E_INT6 bit.
set E_INT6 clear E_INT6
0 1
E_INT6 interrupt cleared (to 0)
1 0
E_INT6 interrupt set (to 1)
Other than above
E_INT6 interrupt not changed
Sets/clears the E_INT5 bit.
set E_INT5 clear E_INT5
0 1 E_INT5 interrupt cleared (to 0)
1 0 E_INT5 interrupt set (to 1)
Other than above E_INT5 interrupt not changed
Sets/clears the E_INT4 bit.
set E_INT4 clear E_INT4
0 1 E_INT4 interrupt cleared (to 0)
1 0 E_INT4 interrupt set (to 1)
Other than above E_INT4 interrupt not changed
Sets/clears the E_INT3 bit.
set E_INT3 clear E_INT3
0 1 E_INT3 interrupt cleared (to 0)
1 0 E_INT3 interrupt set (to 1)
Other than above E_INT3 interrupt not changed
User's Manual U14492EJ5V0UD
Function
Function
Operation
Operation
Operation
Operation
(2/3)
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