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(15) CAN global interrupt enable register (CGIE)
The CGIE register is used to issue interrupt requests for global interrupts.
This register can be read/written in 16-bit units.
Cautions 1. Both bitwise writing and direct writing to the CGIE register are prohibited. Attempts to
write directly to this register may result in operation faults, so be sure to follow the
sequence described in 11.9 Cautions on Bit Set/Clear Function.
2. When writing to the CGIE register, set or clear bits according to the register
configuration during a write operation.
15
14
13
CGIE
0
0
0
(Read)
15
14
13
CGIE
0
0
0
(Write)
(a) Read
Bit position
Bit name
2
G_IE2
1
G_IE1
(b) Write
Bit position
Bit name
10, 9, 2, 1
set G_IEn,
clear
G_IEn
Note xxxx: CAN message buffer registers can be allocated to the xxxx addresses as programmable
peripheral I/O registers. Note, however, that the xxxx addresses cannot be changed after being
set.
m = 2, 6, A, E
Remark
n = 1, 2
568
CHAPTER 11 FCAN CONTROLLER
12
11
10
9
8
7
0
1
0
1
0
0
12
11
10
9
8
7
set
set
0
0
0
0
G_IE2
G_IE1
This is the invalid write access (to temporary buffer, etc.) interrupt enable flag.
0: Interrupt disabled
1: Interrupt enabled
This is the unavailable memory address access interrupt enable flag.
0: Interrupt disabled
1: Interrupt enabled
Sets/clears the G_IEn bit.
set G_IEn
clear G_IEn
0
1
1
0
Other than above
User's Manual U14492EJ5V0UD
6
5
4
3
2
1
0
0
0
0
G_IE2
G_IE1
6
5
4
3
2
1
clear
clear
0
0
0
0
G_IE2
G_IE1
Function
Function
Setting of G_IEn Bit
G_IEn bit cleared
G_IEn bit set
No change in G_IEn bit value
0
Address
Initial value
Note
xxxxmC12H
0A00H
0
0
0
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