NEC UPD703116 User Manual page 594

(28) CAN1 synchronization control register (C1SYNC)
The C1SYNC register controls the data bit time for transmission speed.
This register can be read/written in 16-bit units.
Cautions 1. The CPU is able to read the C1SYNC register at any time.
2. Writing to the C1SYNC register is enabled when in initialization mode (when C1CTRL
register's INIT bit = 1).
3. The limit values of the CAN protocol when setting the SPTn bit and DBTn bit are as
follows.
5 × BTL ≤ SPT (sampling point) ≤ 17 × BTL [4 ≤ SPT4 to SPT0 set values ≤ 16]
8 × BTL ≤ DBT (data bit time) ≤ 25 × BTL [7 ≤ DBT4 to DBT0 set values ≤ 24]
SJW (synchronization jump width) ≤ DBT − SPT
2 ≤ (DBT − SPT) ≤ 8
Remark BTL = 1/f
15 14 13
C1SYNC 0 0 0
Bit position Bit name
12 SAMP
11, 10 SJW1,
SJW0
Note xxxx: CAN message buffer registers can be allocated to the xxxx addresses as programmable
peripheral I/O registers. Note, however, that the xxxx addresses cannot be changed after being
set.
m = 2, 6, A, E
594
CHAPTER 11 FCAN CONTROLLER
(f : CAN protocol layer base system clock)
BTL BTL
12 11 10 9 8 7
SAMP SJW1 SJW0 SPT4 SPT3 SPT2
Specifies bit sampling.
0: Receive data sampled once at the sampling point.
1: Receive data sampled three times and the majority value used as the sampled value.
Specifies synchronization jump width stipulated in the CAN protocol specification, Ver. 2.0,
PartB active.
SJW1 SJW0
0 0
0 1
1 0
1 1
Note Stipulated in CAN protocol specification Ver. 2.0, PartB active
Remark BTL = 1/f (f
BTL
BTL
User's Manual U14492EJ5V0UD
6 5 4 3 2 1
SPT1 SPT0 DBT4 DBT3 DBT2 DBT1
Function
Synchronization jump width
BTL
BTL × 2
BTL × 3
BTL × 4
: CAN protocol layer base system clock)
0 Address Initial value
Note
DBT0 xxxxmC5EH 0218H
Note
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