NEC UPD703116 User Manual page 268

Figure 9-26. Change Timing from 100% Duty State (1) (PWM Mode 1)
count value
Interrupt request
Positive phase
(TO0n0, TO0n2, TO0n4)
Negative phase
(TO0n1, TO0n3, TO0n5)
Note F/F is reset upon INTTM0n occurrence.
Remarks 1. n = 0, 1
2. x = 0 to 2
3. t: Dead time = (DTRRn + 1)/f
4. The above figure shows an active high case.
268
CHAPTER 9 TIMER/COUNTER FUNCTION
CM0n3
TM0n
a
b
0000H
CM0nx CM0nx CM0nx
match match match
BFCM0nx b 0000H 0000H 0000H 0000H
CM0nx a b
INTCM0n3 INTTM0n INTCM0n3
F/F
DTMnx
t t
t
(f
CLK CLK
User's Manual U14492EJ5V0UD
CM0n3 CM0n3
c
0000H 0000H 0000H 0000H
INTTM0n INTCM0n3 INTTM0n
Note
: Base clock)
CM0n3
c
d
CM0nx CM0nx
match match
d e
c d e
INTCM0n3
INTTM0n
t t
t