NEC UPD703116 User Manual page 66

(3) On-chip peripheral I/O area
4 KB of memory, addresses FFFF000H to FFFFFFFH, is provided as an on-chip peripheral I/O area.
An image of addresses FFFF000H to FFFFFFFH can be seen in the area between addresses 3FFF000H and
Note
3FFFFFFH .
Note Access to the area of addresses 3FFF000H to 3FFFFFFH is prohibited. To access the on-chip
peripheral I/O, specify addresses FFFF000H to FFFFFFFH.
On-chip peripheral I/O registers associated with the operation mode specification and the state monitoring for
the on-chip peripherals I/O are all memory-mapped to the on-chip peripheral I/O area. Program fetches
cannot be executed from this area.
Cautions 1. The least significant bit of an address is not decoded. Therefore, if byte access is
executed in the register at an odd address (2n + 1), the register at the even address (2n)
will be accessed because of the hardware specification.
2. In the V850E/IA1, no registers exist that are capable of word access, but if a register is
word accessed, halfword access is performed twice in the order of lower address, then
higher address of the word area, ignoring the lower 2 bits of the address.
3. For registers in which byte access is possible, if halfword access is executed, the
higher 8 bits become undefined during the read operation, and the lower 8 bits of data
are written to the register during the write operation.
4. Addresses that are not defined as registers are reserved for future expansion. If these
addresses are accessed, the operation is undefined and not guaranteed.
5. Addresses 3FFF000H to 3FFFFFFH cannot be specified as the source/destination
address of DMA transfer. Be sure to use addresses FFFF000H to FFFFFFFH for the
source/destination address of DMA transfer.
In the on-chip peripheral I/O area, a 16 KB area of addresses from x0000H to x3FFFH is provided as a
programmable peripheral I/O area.
exclusively for the FCAN controller (see 3.4.9 Programmable peripheral I/O registers).
Caution When emulating the FCAN controller using the in-circuit emulator (IE-V850E-MC or IE-
703116-MC-EM1), perform the following settings in the Configuration screen that appears
when the debugger is started.
• Set the start address of the programmable peripheral I/O area that is set using the BPC
register to the Programmable I/O Area field.
• Map the programmable peripheral I/O area as "Target" or "Emulation RAM" in the
Memory Mapping field.
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CHAPTER 3 CPU FUNCTION
FFFFFFFH
On-chip peripheral I/O area
(4 KB)
FFFF000H
Within this area, the area between x2000H and x2FFFH is used
User's Manual U14492EJ5V0UD