NEC UPD703116 User Manual page 624

<6> If the OS (OSEK/COM) is not used, be sure to execute the following processing.
[When CAN communication is performed using an interrupt routine]
• Clear (0) the following interrupt pending bits at the start of the corresponding interrupt routine.
• C1INTm bit of C1INTP register (m = 0 to 6)
• GINT1 bit of CGINTP register (m = 1 to 3)
• Clear (0) the following enable bits during the corresponding interrupt routine.
• E_INTm bit of C1IE register (m = 0 to 6)
• G_IEn bit of CGIE register (n = 1, 2)
[When CAN communication is performed by polling of bits, not using interrupt routines]
• The following interrupt mask flags and interrupt enable bits are used when set (1) (do not clear (0)
them).
• CANMKn bit of CANICn register (n = 0 to 3)
• E_INTm bit of C1IE register (m = 0 to 6)
• G_IEn bit of CGIE register (n = 1, 2)
• IE bit of M_CTRLn register (n = 00 to 31)
• Clear (0) the following interrupt pending bits in accordance with procedures (i) to (iii) below.
• C1INTm bit of C1INTP register (m = 0 to 6)
• GINTn bit of CGINTP register (n = 1 to 3)
(i) Poll the corresponding interrupt request flag.
(ii) If the value of the bit in procedure (i) is 1, clear (0) the corresponding interrupt pending bit.
(iii) After executing procedure (ii), clear (0) the interrupt request flag.
Example CAN reception
(i) Poll until the CANIF0 bit of the CANIC0 register becomes 1.
(ii) Clear (0) the C1INT1 bit of the C1INTP register.
(iii) Clear (0) the CANIF0 bit of the CANIC0 register.
<7> When emulating the FCAN controller using the in-circuit emulator (IE-V850E-MC or IE-703116-MC-EM1),
perform the following settings in the Configuration screen that appears when the debugger is started.
• Set the start address of the programmable peripheral I/O area that is set using the BPC register to the
Programmable I/O Area field.
• Maps the programmable peripheral I/O area as "Target" or "Emulation RAM" in the Memory Mapping
field.
624
CHAPTER 11 FCAN CONTROLLER
User's Manual U14492EJ5V0UD