(c) Read cycle (CLKOUT synchronous/asynchronous, 1 wait)
CLKOUT (output)
A16 to A23 (output)
CS0 to CS7 (output)
AD0 to AD15 (I/O)
ASTB (output)
RD (output)
WAIT (input)
Caution When interfacing with the external device using the CLKOUT signal, set the internal system
clock frequency (f
Remark
LWR and UWR are high level.
776
CHAPTER 18 ELECTRICAL SPECIFICATIONS
T1
T2
<45>
<19>
<46>
Address
<47>
<16>
<17>
<27>
<48>
<21>
<35>
<52>
<37>
<36>
<38>
<31>
<33>
<32>
<34>
) to 32 MHz or lower.
XX
User's Manual U14492EJ5V0UD
TW
<49>
Hi-Z
Data
<18>
<20>
<26>
<53>
<52>
<53>
T3
<50>
<47>
<22>
<24>
<48>
<23>
<25>