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(3) Timer 2 count clock/control edge selection register 0 (CSE0)
The CSE0 register is used to specify the TM2n count clock and the control valid edge (n = 0, 1).
This register can be read/written in 16-bit units.
When the higher 8 bits of the CSE0 register are used as the CSE0H register, and the lower 8 bits are used as
the CSE0L register, they can be read/written in 8-bit or 1-bit units.
15
14
13
12
CSE0
0
0
0
0
Bit position
Bit name
11, 10, 9, 8
TESnE1,
TESnE0
7, 6
CESE1,
CESE0
5 to 3, 2 to 0
CSEn2,
CSEn1,
CSEn0
336
CHAPTER 9 TIMER/COUNTER FUNCTION
11
10
9
8
7
6
TES1E1
TES1E0
TES0E1
TES0E0
CESE1
CESE0
Specifies the valid edge of the TM2n internal count clock (TCOUNTEn) signal.
TESnE1
TESnE0
0
0
1
1
Specifies the valid edge of the TM2n external clear input (TCLR2).
CESE1
0
0
1
1
Selects internal count clock (TCOUNTEn) of TM2n.
CSEn2
CSEn1
0
0
0
0
1
1
1
1
User's Manual U14492EJ5V0UD
5
4
3
2
1
CSE12
CSE11
CSE10
CSE02
CSE01
CSE00
Function
0
Falling edge
1
Rising edge
0
Setting prohibited
1
Both rising and falling edges
CESE0
0
Falling edge
1
Rising edge
0
Through input (no clear operation)
1
Both rising and falling edges
CSEn0
Note 1
0
0
f
/2
CLK
0
1
f
/4
CLK
1
0
f
/8
CLK
1
1
f
/16
CLK
0
0
f
/32
CLK
0
1
f
/64
CLK
1
0
f
/128
CLK
1
1
Selects input signal from external clock
input pin (TI2) as clock.
0
Address
Initial value
FFFFF642H
0000H
Valid edge
Note
Valid edge
Count clock
(1/2)
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