NEC UPD703116 User Manual page 305

Bit position Bit name
5, 4 CESUDn1,
CESUDn0
3, 2 IES1n11,
IES1n10
1, 0 IES1n01,
IES1n00
Remark n = 0, 1
CHAPTER 9 TIMER/COUNTER FUNCTION
Specifies valid edge of pins TCLR10, TCLR11.
CESUDn1 CESUDn0
0 0
0 1
1 0
1 1
The set values of bits CESUDn1 and CESUDn0 and the TM1n operation are related
as follows.
00: TM1n cleared after detection of falling edge of TCLR1n
01: TM1n cleared after detection of rising edge of TCLR1n
10: TM1n cleared status held while TCLR1n input is low level
11: TM1n cleared status held while TCLR1n input is high level
Caution The set values of the CESUDn1 and CESUDn0 bits are valid only in
UDC mode A.
Specifies valid edge of the pin (INTP1n1/INTP1n0) selected by the CSLn bit of the
CSL1n register.
IES1n11 IES1n10
0 0
0 1
1 0
1 1
Specifies valid edge of pins INTP100, INTP110.
IES1n01 IES1n00
0 0
0 1
1 0
1 1
User's Manual U14492EJ5V0UD
Function
Valid edge
Falling edge
Rising edge
Low level
High level
Valid edge
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
Valid edge
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
(2/2)
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