Table of Contents
Advertisement
(5) Operation of output circuit
Figures 9-81 to 9-84 show the output circuit operation.
Figure 9-81. Signal Output Operation: Toggle Mode 0 and Toggle Mode 1
f
CLK
Note 1
OTMEn1, OTMEn0 bits
S/T
RA
RB
RN
TO2n timer output
Note 2
(ALVEn bit = 0
)
TO2n timer output
Note 2
(ALVEn bit = 1
)
Notes 1.
OTMEn1, OTMEn0 bits of OCTLE0 register
2.
ALVEn bit of OCTLE0 register
Remarks 1. f
: Base clock
CLK
2. RA: Zero count signal input of TM20 (output circuit reset signal)
RB: Zero count signal input of TM21 (output circuit reset signal)
RN: Interrupt signal input of sub-channel n (output circuit reset signal)
S/T: Interrupt signal input of sub-channel n (output circuit set signal)
3. n = 1 to 4
CHAPTER 9 TIMER/COUNTER FUNCTION
(When OCTLE0 Register's SWFEn Bit = 0, and ODELE0 Register's ODLEn2
to ODLEn0 Bits = 0)
00B
User's Manual U14492EJ5V0UD
01B
367
Advertisement
Table of Contents
