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Register Name
M_DLC00
M_DLC01
M_DLC02
M_DLC03
M_DLC04
M_DLC05
M_DLC06
M_DLC07
M_DLC08
M_DLC09
M_DLC10
M_DLC11
M_DLC12
M_DLC13
M_DLC14
M_DLC15
Note CAN message buffer registers can be allocated to the xxxx addresses as programmable peripheral I/O
registers. Note, however, that the xxxx addresses cannot be changed after being set.
546
CHAPTER 11 FCAN CONTROLLER
Table 11-17. Addresses of M_DLCn (n = 00 to 31)
Note
Address
(m = 2, 6, A, E)
xxxxm804H
xxxxm824H
xxxxm844H
xxxxm864H
xxxxm884H
xxxxm8A4H
xxxxm8C4H
xxxxm8E4H
xxxxm904H
xxxxm924H
xxxxm944H
xxxxm964H
xxxxm984H
xxxxm9A4H
xxxxm9C4H
xxxxm9E4H
User's Manual U14492EJ5V0UD
Register Name
Address
M_DLC16
M_DLC17
M_DLC18
M_DLC19
M_DLC20
M_DLC21
M_DLC22
M_DLC23
M_DLC24
M_DLC25
M_DLC26
M_DLC27
M_DLC28
M_DLC29
M_DLC30
M_DLC31
Note
(m = 2, 6, A, E)
xxxxmA04H
xxxxmA24H
xxxxmA44H
xxxxmA64H
xxxxmA84H
xxxxmAA4H
xxxxmAC4H
xxxxmAE4H
xxxxmB04H
xxxxmB24H
xxxxmB44H
xxxxmB64H
xxxxmB84H
xxxxmBA4H
xxxxmBC4H
xxxxmBE4H
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