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Table 1-2. Differences Between V850E/IA1 and V850E/IA2 Register Setting Values
Register Name
System wait control register (VSWC)
Timer 1/timer 2 clock selection register
(PRM02)
Notes 1.
Setting the TESnE1 and TESnE0 bits of timer 2 count clock/control edge select register 0 (CSE0) to
11B (both rising/falling edges) is prohibited when the PRM2 bit of the timer 1/timer 2 clock selection
register (PRM02) is 1B (f
2.
Set the VSWC register to 15H when the PRM2 bit of the timer 1/timer 2 clock selection register
(PRM02) = 0B (f
Remark
For details, refer to the user's manual of each product.
20
CHAPTER 1 INTRODUCTION
V850E/IA1
12H
00H or 01H
= f
/2)
CLK
XX
= f
/4).
CLK
XX
User's Manual U14492EJ5V0UD
Note
02H
01H (initial value 00H)
V850E/IA2
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