NEC UPD703116 User Manual page 182

(3) Valid edge selection register (SESC)
This register specifies the valid edge for external interrupt requests (INTP30, INTP31, TCLR3, and TI3), input
via external pins.
The valid edge can be specified independently for each pin (rising edge, falling edge, or both rising and falling
edges).
This register can be read/written in 8-bit or 1-bit units.
Cautions 1. The TM3CAE and TM3CE bits of timer control register 30 (TMC30) must be set (1) before
using the TI3/TCLR3/INTP30 and TO3/INTP31 pins as INTP30 and INTP31, even if not
using timer 3.
2. Before setting the INTP30, INTP31, TCLR3, and TI3 pins to the trigger mode, set the
PMC2 register.
If the PMC2 register is set after the SESC register has been set, an illegal interrupt may
occur as soon as the PMC2 register is set.
7 6
SESC TES31 TES30
TI3
Bit position Bit name
7, 6 TES31,
TES30
5, 4 CES31,
CES30
3, 2 IES311,
IES310
1, 0 TES301,
TES300
182
CHAPTER 7 INTERRUPT/EXCEPTION PROCESSING FUNCTION
5 4 3
CES31 CES30 IES311
TCLR3
Specifies the valid edge of the INTP30, INTP31, TCLR3, and TI3 pins.
xESn1 xESn0
0 0
0 1
1 0
1 1
Remark n = 3, 30, 31
User's Manual U14492EJ5V0UD
2 1
IES310 IES301 IES300
INTP31 INTP30
Function
Operation
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
0 Address Initial value
FFFFF689H 00H