NEC UPD703116 User Manual page 574

32-bit single-chip microcontrollers

Table of Contents

(19) CAN1 address mask a registers L and H (C1MASKLa and C1MASKHa)

The C1MASKLa and C1MASKHa registers are used to extend the number of receivable messages by

masking part of the message's identifier (ID) and then ignoring the masked parts (a = 0 to 3).

These registers can be read/written in 16-bit units.

Cautions 1. When the receive message buffer is linked to the C1MASKLa and C1MASKHa registers,

regardless of whether the ID in the receive message buffer is a standard ID (11 bits) or

extended ID (29 bits), set all the 32-bit values of the C1MASKLa and C1MASKHa

registers (a = 0 to 3).

2. When the C1MASKLa and C1MASKHa registers are linked to a message buffer for

standard ID, the lower 18 bits of the data field in the data frame are also automatically

compared. Therefore, if it is not necessary to compare the lower 18 bits (i.e., to mask

the lower 18 bits), set the CMID17 to CMID0 bits to 1 (a = 0 to 3). The standard ID and

extended ID can use the same mask.

(a = 0 to 3)

(a = 0 to 3)

Bit position

CHAPTER 11 FCAN CONTROLLER

Sets mask for identifier (ID) format.

0: ID format (standard or extended) checked

1: ID format (standard or extended) not checked

When the CMIDE bit is set (1), the higher 11 bits of the ID are compared. The receive

message and the ID format stored in a message buffer are not compared.

Sets mask for identifier (ID) bit.

0: ID bit in message buffer linked to bits CMID28 to CMID0 compared with received ID

1: ID bit in message buffer linked to bits CMID28 to CMID0 not compared (ID bit

masked) with received ID bit

User's Manual U14492EJ5V0UD

Initial value

See Table 11-26

Initial value

See Table 11-26