NEC UPD703116 User Manual page 104

The following diagram shows the CS signal, which is enabled for area 0 when the CSC0 register is set to
0703H.
When the CSC0 register is set to 0703H, CS0 and CS2 are output to block 0 and block 1, but since CS0 has
priority over CS2, CS0 is output if the addresses of block 0 and block 1 are accessed.
If the address of block 3 is accessed, both the CS03 and CS23 bits of the CSC0 register are 0, and CS1 is
output.
104
CHAPTER 4 BUS CONTROL FUNCTION
Figure 4-1. Example When CSC0 Register Is Set to 0703H
3FFFFFFH
58 MB
0800000H
07FFFFFH
0600000H
05FFFFFH
2 MB
0400000H
03FFFFFH
0200000H
4 MB
01FFFFFH
0000000H
User's Manual U14492EJ5V0UD
CS1 is output.
Block 3
(2 MB)
Block 2
CS2 is output.
(2 MB)
Block 1
(2 MB)
CS0 is output.
Block 0
(2 MB)