NEC UPD703116 User Manual page 482

7 6
CSIC0 0 0
7 6
CSIC1 0 0
Bit position Bit name
4, 3 CKP, DAP
2 to 0 CKS2 to
CKS0
482
CHAPTER 10 SERIAL INTERFACE FUNCTION
5 4 3
0 CKP DAP
5 4 3
0 CKP DAP
Specifies operation mode.
CKP DAP
0 0
SOn (output)
0 1
SOn (output)
1 0
SOn (output)
1 1
SOn (output)
Remark n = 0, 1
Specifies serial clock.
CKS2 CKS1 CKS0
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
Remark f : Internal system clock frequency
XX
n = 0, 1
User's Manual U14492EJ5V0UD
2 1 0
CKS2 CKS1 CKS0
2 1 0
CKS2 CKS1 CKS0
Function
Operation mode
SCKn (I/O)
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
SIn (input) DI7 DI6 DI5 DI4
SCKn (I/O)
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
SIn (input) DI7 DI6 DI5 DI4
SCKn (I/O)
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
SIn (input) DI7 DI6 DI5 DI4
SCKn (I/O)
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
SIn (input) DI7 DI6 DI5 DI4
Serial clock
7
0 f /2
XX
6
1 f /2
XX
5
0 f /2
XX
4
1 f /2
XX
3
0 f /2
XX
2
1 f /2
XX
0 Clock generated by BRG3
1 External clock (SCKn)
Address Initial value
FFFFF901H 00H
Address Initial value
FFFFF911H 00H
DI3 DI2 DI1 DI0
DI3 DI2 DI1 DI0
DI3 DI2 DI1 DI0
DI3 DI2 DI1 DI0
Mode
Master mode
Master mode
Master mode
Master mode
Master mode
Master mode
Master mode
Slave mode