NEC UPD703116 User Manual page 598

Figure 11-28. CAN Main Clock Selection Register (CGCS) Settings
Select clock for memory access controller
Select global timer clock
Select system timer prescaler
Remark
Figure 11-29. CAN Global Interrupt Enable Register (CGIE) Settings
• An interrupt occurs if a memory address
in the undefined area is accessed.
• An interrupt occurs if the GOM bit is not
cleared (0) under the following conditions.
• When shutdown is disabled (EFSD bit = 0)
• When a CAN module not in the initialization
status (ISTAT bit = 0) exists
• An interrupt occurs if an illegal write
access is made to the TEMP buffer when
the GOM bit = 1.
• An interrupt occurs if the CAN module
register (register starting with "C1") is accessed
when the GOM bit = 0.
Remark
598
CHAPTER 11 FCAN CONTROLLER
START
(MCP0 to MCP3)
f
MEM
(GTCS0, GTCS1)
f
GTS1
(CGTS0 to CGTS7)
f
GTS
f = CAN base clock
MEM
f = Clock supplied to CAN
MEM1
f = Global timer clock
GTS1
f = System timer prescaler
GTS
GOM: Bit of CAN global status register (CGST)
EFSD: Bit of CAN global status register (CGST)
ISTAT: Bit of CAN1 control register (C1CTRL)
User's Manual U14492EJ5V0UD
f = f /(n + 1)
MEM MEM1
n = 0 to 15 (set using bits MCP0 to MCP3)
GTCS1, GTCS0 = 00: f = f
GTS1
GTCS1, GTCS0 = 01: f = f
GTS1
GTCS1, GTCS0 = 10: f = f
GTS1
GTCS1, GTCS0 = 11: f = f
GTS1
f = f /(n + 1)
GTS GTS1
n = 0 to 255 (set using bits CGTS0 to CGTS7)
START
Enable interrupt
for G_IE1 bit
No
Enable interrupt
for G_IE2 bit
No
/2
MEM
/4
MEM
/8
MEM
/16
MEM
Yes
set G_IE1 = 1
clear G_IE1 = 0
Yes
set G_IE2 = 1
clear G_IE2 = 0