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Register Name
M_IDL00
M_IDL01
M_IDL02
M_IDL03
M_IDL04
M_IDL05
M_IDL06
M_IDL07
M_IDL08
M_IDL09
M_IDL10
M_IDL11
M_IDL12
M_IDL13
M_IDL14
M_IDL15
Note CAN message buffer registers can be allocated to the addresses xxxx as programmable peripheral I/O
registers. Note, however, that the xxxx addresses cannot be changed after being set.
Register Name
M_IDH00
M_IDH01
M_IDH02
M_IDH03
M_IDH04
M_IDH05
M_IDH06
M_IDH07
M_IDH08
M_IDH09
M_IDH10
M_IDH11
M_IDH12
M_IDH13
M_IDH14
M_IDH15
Note CAN message buffer registers can be allocated to the addresses xxxx as programmable peripheral I/O
registers. Note, however, that the xxxx addresses cannot be changed after being set.
554
CHAPTER 11 FCAN CONTROLLER
Table 11-21. Addresses of M_IDLn (n = 00 to 31)
Note
Address
(m = 2, 6, A, E)
xxxxm810H
xxxxm830H
xxxxm850H
xxxxm870H
xxxxm890H
xxxxm8B0H
xxxxm8D0H
xxxxm8F0H
xxxxm910H
xxxxm930H
xxxxm950H
xxxxm970H
xxxxm990H
xxxxm9B0H
xxxxm9D0H
xxxxm9F0H
Table 11-22. Addresses of M_IDHn (n = 00 to 31)
Note
Address
(m = 2, 6, A, E)
xxxxm812H
xxxxm832H
xxxxm852H
xxxxm872H
xxxxm892H
xxxxm8B2H
xxxxm8D2H
xxxxm8F2H
xxxxm912H
xxxxm932H
xxxxm952H
xxxxm972H
xxxxm992H
xxxxm9B2H
xxxxm9D2H
xxxxm9F2H
User's Manual U14492EJ5V0UD
Register Name
Address
M_IDL16
M_IDL17
M_IDL18
M_IDL19
M_IDL20
M_IDL21
M_IDL22
M_IDL23
M_IDL24
M_IDL25
M_IDL26
M_IDL27
M_IDL28
M_IDL29
M_IDL30
M_IDL31
Register Name
Address
M_IDH16
M_IDH17
M_IDH18
M_IDH19
M_IDH20
M_IDH21
M_IDH22
M_IDH23
M_IDH24
M_IDH25
M_IDH26
M_IDH27
M_IDH28
M_IDH29
M_IDH30
M_IDH31
Note
(m = 2, 6, A, E)
xxxxmA10H
xxxxmA30H
xxxxmA50H
xxxxmA70H
xxxxmA90H
xxxxmAB0H
xxxxmAD0H
xxxxmAF0H
xxxxmB10H
xxxxmB30H
xxxxmB50H
xxxxmB70H
xxxxmB90H
xxxxmBB0H
xxxxmBD0H
xxxxmBF0H
Note
(m = 2, 6, A, E)
xxxxmA12H
xxxxmA32H
xxxxmA52H
xxxxmA72H
xxxxmA92H
xxxxmAB2H
xxxxmAD2H
xxxxmAF2H
xxxxmB12H
xxxxmB32H
xxxxmB52H
xxxxmB72H
xxxxmB92H
xxxxmBB2H
xxxxmBD2H
xxxxmBF2H
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