NEC UPD703116 User Manual page 242

Bit position Bit name
0 WPORTn
Remark n = 0, 1
ALVTO bit: Bit 7 of the TOMRn register
ALVWB bit: Bit 4 of the TOMRn register
The TO0n0 to TO0n5 pins can be set to timer output by a match between TM0n and the compare register or to
software output using the PSTOn register (TORTOn bit = 1). Software output has the priority over timer output.
Consequently, when the setting changes from TM0CEn = 1 (timer operation enabled), TORTOn = 1 (software
output enabled) to TM0CEn = 1 (timer operation enabled), TORTOn = 0 (software output disabled), the TO0n0 to
TO0n5 pins continue to perform software output until the occurrence of the first F/F set/reset due to a match between
TM0n and the compare register after the TORTOn bit setting changes.
The relationship between the settings of the TORTOn and TM0CEn bits when ALVTO = 1 and the output of TO0n0
(positive phase side) is shown on the following pages (the negative phase side (TO0n1, TO0n3, and TO0n5) is
dependent on the ALVUB, ALVVB, and ALVWB bits, so refer to the explanations of each of these bits).
242
CHAPTER 9 TIMER/COUNTER FUNCTION
Specifies the TO0n4 (W phase)/TO0n5 (W phase) pin output value.
WPORTn
0 TO0n4 Inverted level of ALVTO bit setting
TO0n5 When ALVWB = 0
When ALVWB = 1
1 TO0n4 Level of ALVTO bit setting
TO0n5 When ALVWB = 0
When ALVWB = 1
Caution If the WPORTn bit setting value is changed when TORTOn = 1, the
dead-time setting becomes valid for the TO0n4/TO0n5 output signal
in the same way as during normal timer operation.
User's Manual U14492EJ5V0UD
Function
Operation
Level of ALVTO bit setting
Inverted level of ALVTO bit setting
Inverted level of ALVTO bit setting
Level of ALVTO bit setting
(2/2)