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CHAPTER 11 SERIAL INTERFACE UART0 (
11.4.3 Dedicated baud rate generator
The dedicated baud rate generator consists of a source clock selector and a 5-bit programmable counter, and
generates a serial clock for transmission/reception of UART0.
Separate 5-bit counters are provided for transmission and reception.
(1) Configuration of baud rate generator
• Base clock
The clock selected by bits 7 and 6 (TPS01 and TPS00) of baud rate generator control register 0 (BRGC0) is
supplied to each module when bit 7 (POWER0) of asynchronous serial interface operation mode register 0
(ASIM0) is 1. This clock is called the base clock and its frequency is called f
to low level when POWER0 = 0.
• Transmission counter
This counter stops, cleared to 0, when bit 7 (POWER0) or bit 6 (TXE0) of asynchronous serial interface
operation mode register 0 (ASIM0) is 0.
It starts counting when POWER0 = 1 and TXE0 = 1.
The counter is cleared to 0 when the first data transmitted is written to transmit shift register 0 (TXS0).
• Reception counter
This counter stops operation, cleared to 0, when bit 7 (POWER0) or bit 5 (RXE0) of asynchronous serial
interface operation mode register 0 (ASIM0) is 0.
It starts counting when the start bit has been detected.
The counter stops operation after one frame has been received, until the next start bit is detected.
f
/2
X
3
f
/2
X
5
f
/2
X
8-bit timer/
event counter
50 output
Remark POWER0: Bit 7 of asynchronous serial interface operation mode register 0 (ASIM0)
TXE0:
RXE0:
BRGC0:
218
Figure 11-11. Configuration of Baud Rate Generator
POWER0
Selector
f
XCLK0
BRGC0: TPS01, TPS00
Bit 6 of ASIM0
Bit 5 of ASIM0
Baud rate generator control register 0
Preliminary User's Manual U16846EJ1V0UD
µ
PD78F0102H AND 78F0103H ONLY)
Baud rate generator
POWER0, TXE0 (or RXE0)
5-bit counter
Match detector
BRGC0: MDL04 to MDL00
. The base clock is fixed
XCLK0
1/2
Baud rate
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