NEC UPD703116 User Manual page 571

32-bit single-chip microcontrollers

Table of Contents

CGTS7 CGTS6 CGTS5 CGTS4 CGTS3 CGTS2 CGTS1 CGTS0 GTCS1 GTCS0 MCP3 MCP2

Note Only when the TLM bit of the CAN1 bit rate prescaler register (C1BRP) is 1

Caution When using a 1 Mbps transfer rate for the CPU, input f

another frequency, subsequent operation is not guaranteed.

(17) CAN time stamp count register (CGTSC)

The CGTSC register indicates the contents of the time stamp counter.

This register can be read at any time.

This register can be written to only when clearing bits. The clear function writes 0 to all bits in the CGTSC

This register is read-only, in 16-bit units.

Note xxxx: CAN message buffer registers can be allocated to the xxxx addresses as programmable

peripheral I/O registers. Note, however, that the xxxx addresses cannot be changed after being

m = 2, 6, A, E

CHAPTER 11 FCAN CONTROLLER

Figure 11-26. FCAN Clocks

CAN main clock selection register (CGCS)

Global timer

clock prescaler

Baud rate generator

User's Manual U14492EJ5V0UD

Global timer

system clock

CAN1 synchronization

control register

Data bit time

CAN1 bit rate prescaler register

as a 16 MHz clock signal. If input at

Time stamp counter

Initial value