NEC UPD703116 User Manual page 480

32-bit single-chip microcontrollers
Table of Contents

Advertisement

<7>
<6>
CSIM0
CSICAE0
TRMD0
<7>
<6>
CSICAE1
TRMD1
CSIM1
Bit position
Bit name
7
CSICAEn
6
TRMDn
5
CCL
4
DIRn
3
CSIT
2
AUTO
0
CSOTn
Remark
n = 0, 1
480
CHAPTER 10 SERIAL INTERFACE FUNCTION
5
<4>
3
CCL
DIR0
CSIT
5
<4>
3
CCL
DIR1
CSIT
Enables/disables CSIn operation.
0: Disable CSIn operation.
1: Enable CSIn operation.
The internal CSIn circuit can be reset asynchronously by setting the CSICAEn bit
to 0. For the SCKn and SOn pin output status when the CSICAEn bit = 0, refer to
10.4.5 Output pins.
Specifies transmission/reception mode.
0: Receive-only mode
1: Transmission/reception mode
When the TRMDn bit = 0, receive-only transfer is performed and the SOn pin
output is fixed to low level. Data reception is started by reading the SIRBn
register.
When the TRMDn bit = 1, transmission/reception is started by writing data to the
SOTBn register.
Specifies data length.
0: 8 bits
1: 16 bits
Specifies transfer direction mode (MSB/LSB).
0: First bit of transfer data is MSB
1: First bit of transfer data is LSB
Controls delay of interrupt request signal.
0: No delay
1: Delay mode (interrupt request signal is delayed 1/2 cycle).
Caution The delay mode (CSIT bit = 1) is valid only in the master mode
(CKS2 to CSK0 bits of the CSICn register are not 111B). In the
slave mode (CKS2 to CKS0 bits are 111B), do not set the delay
mode.
Specifies single transfer mode or repeat transfer mode.
0: Single transfer mode
1: Repeat transfer mode
Flag indicating transfer status.
0: Idle status
1: Transfer execution status
Caution The CSOTn bit is cleared (0) by writing 0 to the CSICAEn bit.
User's Manual U14492EJ5V0UD
2
1
<0>
AUTO
0
CSOT0
2
1
<0>
AUTO
0
CSOT1
Function
Address
Initial value
FFFFF900H
00H
Address
Initial value
FFFFF910H
00H

Advertisement

Table of Contents
loading

Table of Contents