Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2743

ADSP-SC58x SPORT Register Descriptions
Table 34-29: SPORT_ERR_A Register Fields (Continued)
Bit No.
(Access)
5 DERRSSTAT
(R/W1C)
4 DERRPSTAT
(R/W1C)
2 FSERRMSK
(R/W)
1 DERRSMSK
(R/W)
0 DERRPMSK
(R/W)
34–80
Bit Name
Data Error Secondary Status.
The SPORT_ERR_A.DERRSSTAT bit indicates the error status for the half
SPORT's secondary channel data buffers. During transmit
(SPORT_CTL_A.SPTRAN =1), the SPORT_ERR_A.DERRSSTAT bit indicates
the transmit underflow status. During receive (SPORT_CTL_A.SPTRAN =0), the
SPORT_ERR_A.DERRSSTAT bit indicates the receive overflow status. This bit is
used to clear the latch of SPORT status interrupt request when triggered by a secon-
dary data error. This bit can also be used to clear the read-only
SPORT_CTL_A.DERRSEC status bit.
Data Error Primary Status.
The SPORT_ERR_A.DERRPSTAT bit indicates the error status for the half
SPORT's primary channel data buffers. During transmit (SPORT_CTL_A.SPTRAN
=1), the SPORT_ERR_A.DERRPSTAT bit indicates the transmit underflow status.
During receive (SPORT_CTL_A.SPTRAN =0), the SPORT_ERR_A.DERRPSTAT
bit indicates the receive overflow status. This bit is used to clear the latch of SPORT
status interrupt request when triggered by a primary data error. This bit can also be
used to clear the read-only SPORT_CTL_A.DERRPRI status bit.
Frame Sync Error (Interrupt) Mask.
The SPORT_ERR_A.FSERRMSK unmasks (enables) the half SPORT to generate the
frame sync error interrupt request.
Data Error Secondary (Interrupt) Mask.
The SPORT_ERR_A.DERRSMSK unmasks (enables) the half SPORT to generate the
data error interrupt request for the secondary channel.
Data Error Primary (Interrupt) Mask.
The SPORT_ERR_A.DERRPMSK unmasks (enables) the half SPORT to generate the
data error interrupt request for the primary channel.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 No error
1 Error (transmit underflow or receive overflow)
0 No error
1 Error (transmit underflow or receive overflow)
0 Mask (disable)
1 Unmask (enable)
0 Mask (disable)
1 Unmask (enable)
0 Mask (disable)
1 Unmask (enable)