Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2714

Half SPORT 'B' Multichannel 0-31 Select Register
Each of the bits (when set, =1) of the
in multichannel mode. When the register activates a channel (corresponding bit =1), the half SPORT transmits or
receives the word in that channel's position of the data stream. When the register deactivates a channel (correspond-
ing bit =0), the half SPORT either three-states its data transmit pin (during the channel's transmit time slot) or
ignores incoming data (during the channel's receive time slot).
VALUE[31:16] (R/W)
Channel Enable 0-31
Figure 34-14: SPORT_CS0_B Register Diagram
Table 34-16: SPORT_CS0_B Register Fields
Bit No.
(Access)
31:0 VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
SPORT_CS0_B
15
0
VALUE[15:0] (R/W)
Channel Enable 0-31
31
0
Bit Name
Channel Enable 0-31.
register correspond to an active channel for the half SPORT
14 13 12 11 10 9 8 7
0 0 0 0 0 0 0 0
30 29 28 27 26 25 24 23
0 0 0 0 0 0 0 0
Description/Enumeration
ADSP-SC58x SPORT Register Descriptions
6 5 4 3 2 1 0
0 0 0 0 0 0 0
22 21 20 19 18 17 16
0 0 0 0 0 0 0
34–51