Control Register for ASRC 2 and 3
The
register (read/write) controls the operating modes, filters, and data formats used in the sample
ASRC_CTL23
rate converter modules 2 and 3.
EN2 (R/W)
Enable SRC 2
MPHASE2 (R/W)
Matched-phase Mode 2
LENOUT2 (R/W)
Length Output 2
SMODEOUT2 (R/W)
Serial Mode Output 2
DITHER2 (R/W)
Dither Enable 2
SOFTMUTE2 (R/W)
Soft Mute 2
EN3 (R/W)
Enable SRC 3
MPHASE3 (R/W)
Matched-phase Mode 3
LENOUT3 (R/W)
Length Output 3
SMODEOUT3 (R/W)
Serial Mode Output 3
DITHER3 (R/W)
Dither Enable 3
SOFTMUTE3 (R/W)
Soft Mute 3
Figure 36-7: ASRC_CTL23 Register Diagram
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
ADSP-SC58x ASRC Register Descriptions
HARDMUTE2 (R/W)
Hard Mute 2
AUTOMUTE2 (R/W)
Auto Hard Mute 2
SMODEIN2 (R/W)
Serial Mode Input 2
BYP2 (R/W)
Bypass 2
DEEMPHASIS2 (R/W)
De-emphasize Audio 2
HARDMUTE3 (R/W)
Hard Mute 3
AUTOMUTE3 (R/W)
Auto Hard Mute 3
SMODEIN3 (R/W)
Serial Mode Input 3
BYP3 (R/W)
Bypass 3
DEEMPHASIS3 (R/W)
De-emphasize Audio 3
36–17
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