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8.5.
Hub Interface Decoupling Guidelines
The main focus of these guidelines is to minimize signal integrity problems on the hub interface of the
Intel 855PM MCH. To improve I/O power delivery, use two 0.1-µF capacitors per each component (i.e.
the ICH4-M and MCH). These capacitors should be placed within 150 mils from each package, adjacent
to the rows that contain the hub interface. If the layout allows, wide metal fingers running on the VSS
side of the board should connect the VCC1_8 side of the capacitors to the VCC1_8 power balls.
Similarly, if layout allows, metal fingers running on the VCC1_8 side of the board should connect the
GND side of the capacitors to the VSS power balls.
®
Intel
855PM Chipset Platform Design Guide
Hub Interface
181
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