General Layout Recommendations; Figure 56. High Current Path With Bottom Mosfet(S) Turned On - Intel 855PM Design Manual

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Figure 56. High Current Path With Bottom MOSFET(s) Turned ON

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5.8.5.

General Layout Recommendations

All the components in the high current paths dissipate some power, i.e., they get warm when current
runs through them. To minimize temperature rise and facilitate thermal spreading, large copper fill areas
connecting the high current components is imperative. For example, the MOSFET manufacturers
recommend that each MOSFET be mounted on one square inch of two-ounce copper. While this may
not be possible in the mobile environment, this recommendation serves to illustrate the importance of
thermal considerations in the Switching Regulator layout.
Bulk capacitors for Vcc need three vias per pad if vias are not shared. Clusters of bulk and bypass
capacitors may be clustered along the high current paths between the sense resistor and the
processor. Clusters may have copper fill areas between capacitors. This provides additional
opportunities for vias – do not stop at three.
Some controllers sense the load on Vcc by monitoring the voltage drop across the sense resistor
with a Kelvin connection. The two feedback traces do not handle a high current, but must be of
equal lengths to get an accurate load measurement. Connect the feedback signal traces as close as
possible to both ends of the sense resistor. While the feedback traces do not handle high current,
they are high impedance and susceptible to interference from electrical and magnet noise. Avoid
routing these traces near the power inductor and avoid routing through vias.
The sense resistor is to be placed as close to the inductor as possible, followed by the first two bulk
capacitors.
The lead frame in the power MOSFETs is used to dissipate heat. To do this each of the power
MOSFETs requires 1 square inch of copper.
Avoid ground loops as they pick up noise. Use star or single point grounding. The source of the
lower (Synchronous bottom MOSFET) is an ideal point where the input and output ground planes
can be connected.
Keep the inductor-switching node small by placing the output inductor, switching top MOSFET
and synchronous Bottom MOSFETs close together on the same copper fill.
The MOSFET enable/gate traces to the Driver must be as short (less than 1 inch), straight, and wide
as possible (20 to 25 mils). Ideally, the driver has to be placed right next to the MOSFETs.
Circuits using multiple top or bottom MOSFETs need to have the gate traces serpentined so the all
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Intel 855PM Chipset Platform Design Guide
NMOS
DRIVER
TG
NMOS
BG
Voltage
Regulator
Control
Circuitry
V_DC
SCHOTTKY
Feed back
Platform Power Requirements
Output Vcc
RLoad
103