Intel 855PM Design Manual page 285

Chipset platform for use with pentium m and celeron m processors
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R
Pin Name
System
Pull up/Pull down
FBO
See Notes
TDI
Pull up to VCCP
TDO
Pull up to VCCP
TMS
Pull up to VCCP
TRST#
Pull down to GND
®
Intel
855PM Chipset Platform Design Guide
ITP700FLEX Debug Port Connector – Resistor Recommendations
150
(IF ITP700FLEX
IS USED)
150
(IF ITP700FLEX
IS NOT USED)
54.9
± 1%
(IF ITP700FLEX
IS USED)
39.2
± 1%
(IF ITP700FLEX
IS USED)
39
(IF ITP700FLEX
IS NOT USED)
510
- 680
(IF ITP700FLEX
IS USED)
Series Termination
Resistor (
Parallel termination resistor placed
within 2.0" of CPU socket.
See Section 4.3.1.1 and 4.3.1.4 for
details..
ITP700FLEX supported Validation
Systems:
Point-to-point connection to CPU TCK
pin. TCK should fork out at the CPU to
both TCK and FBO.
ITP700FLEX supported Production
Systems:
Leave the signal as NC (No Connect).
See Section 4.3.1.1 and 4.3.1.4 for
details.
ITP700FLEX supported Validation
Systems:
Parallel termination resistor placed
within ±300 ps of CPU TDI pin.
ITP700FLEX supported Production
Systems:
Parallel termination resistor placed
within 2.0" of CPU pin.
See Section 4.3.1.1 and 4.3.1.4 for
details.
22.6
± 1%
ITP700FLEX supported Validation
Systems:
(IF ITP700FLEX IS
Signal needs to be pulled up to VCCP.
USED)
Series dampening resistor placed within
1.0" of ITP700FLEX TDO pin.
ITP700FLEX supported Production
Systems:
Leave the signal as NC (No Connect).
See Section 4.3.1.1 and 4.3.1.4 for
details.
ITP700FLEX supported Validation
Systems:
Parallel termination resistor placed
within ±200 ps of the ITP700FLEX TMS
pin.
ITP700FLEX supported Production
Systems:
Parallel termination resistor placed
within 2.0" of CPU pin.
See Section 4.3.1.1 and 4.3.1.4 for
details.
ITP700FLEX supported Validation
Systems:
Parallel termination resistor can be
Platform Design Checklist
Notes
285

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