Figure 66. Intel 855Pm Mch; Figure 157. Hub Interface With Signal Reference Voltage Divider Circuit; Figure 158. Hub Interface With Locally Generated Reference Voltage Divider Circuit - Intel 855PM Design Manual

Chipset platform for use with pentium m and celeron m processors
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Platform Design Checklist

Figure 157. Hub Interface with Signal Reference Voltage Divider Circuit

NOTES:
R1=R2=100 to 150        
C1=0.01 uF
C2=0.1 uF

Figure 158. Hub Interface with Locally Generated Reference Voltage Divider Circuit

NOTES ::
R1=R2=100 to 150
C1=0.01 uF
C2=0.1uF
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CC
R1
Intel 855PM
MCH
HIREF
C1
R2
V
HI=1.8V
CC
R1
R2
C1
HI=1.8V
Intel
ICH4-M
HIREF
HI_VSWING
C1
C1
C2
HI_VSWING
HIREF
Intel
ICH4-M
C1
®
Intel
855PM Chipset Platform Design Guide
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